|
| |
|
Advancing Microelectronics • Volume 28, No. 2 • March/April 2001
|
| | Table of Contents | Previous Page | Next Page | |
CM2: Cheap MultiChip Modules
Review and Summary of the European INCO-Copernicus Project IC15-CT96-0743
(Establishment of Fast Prototyping Low Cost Multichip Module Technology Facilities in Eastern Europe for the Benefit of European Industry)
Zsolt Illyefalvi-Vitéz, Coordator, TUB.HU, Technical University of Budapest, Hungary; Alfons Vervaet, Financial Coordinator, André Van Calster, IMEC.BE, IMEC, Belgium; Nihal Sinnadurai, TWI.GB, TWI, United Kingdom; Marko Hrovat, JSI.SI, Jozef Stefan Institute, University of Ljubljana, Slovenia; Paul Svasta, UPB.RO, University POLITEHNICA of Bucharest, Romania; Endre Tóth, EP.HU, Elektroprint Kft., Hungary; Darko Belavic, HIPOT.SI, HIPOT Hybrid d.o.o., Slovenia; Radu Mihai Ionescu, SCR.RO, RAMELECTRO S.R.L., Romania; William Dennehy, WD.GB, William Dennehy Ltd., United Kingdom
The Original Objectives of the Project
The most important research and development objectives of the Project were
1. the improvement of the technological capabilities of low cost, high performance electronic circuit modules in some Countries of Central-Eastern Europe (CsCEE);
2. the increase of functional and interconnection density, preferring the application of integrated interconnection substrates to the extremely expensive on-chip customization, in order to achieve the desired level of performance as cost-effectively as possible.
Multichip module technology, utilizing and/or uniting the advantages of laminating (L) and ceramic (C) techniques, was considered and selected as the promising solution of the requirements. The expected results were higher reliability, increased yield, reduced use of materials and processing. Quantitatively, the aim was to realize 300 µm diameter plated-through holes/vias with 100 µm resolution, and 250 µm diameter vias with 125 µm wide lines and spacings, for laminated and ceramic based MCM technologies, respectively. From the assembling point of view we set the target to apply chip-and-wire technology for small and medium scale integrated circuits, which were of high importance in application specific circuit prototyping. The manufacturing systems were planned to integrate new processing technologies with well-established ones in all development phases, including design, manufacturing, assembling and test. Their application was expected to result in faster prototyping and shorter production period, the prototyping facility had to be able to produce competitive and high quality products.
In addition, the RTD Project was intended to
3. strengthen the relationship between research institutions of Central-Eastern Europe (CEE) and their EU Partners in order to enhance research and technological capacities in some Countries of Central-Eastern Europe (CsCEE),
4. establish links with the newly formed Small and Medium-size Enterprises (SMEs) responsible for product development and distribution, and
5. safeguard and stabilize the RTD potential of CsCEE by means of traineeships and seminars for researchers working on the Project.
The industry of both the Central-Eastern European and the European Union countries should get benefit from running the established CHEAP-MULTI-CHIP-MODULE facility. It was decided to be accessible to all SMEs and Research Institutes (RIs) of CsCEE and EU countries. It had to enable, in particular, the small enterprises to solve their specific prototype fabrication problems concerning their customized electronic circuit modules.
Overview of Main Results
1. Established MCM-L, MCM-C Prototyping Facility
Current capabilities of the Cheap MultiChip Modules Project Partners are as follows:
· Requirements Capture, Circuit Simulation, Board Layout and Test Generation for MCM-L by using advanced CAE methods at PUB-CETTI, and also at BME-ETT and partly at all other Partners;
· Dense MCM-L substrate prototyping by conventional photolithography and laser patterning to deliver laminate substrates at BME-ETT;
· Assembly of MCM-L with wire-bonded and flip-chip bare dice and also micro-BGAs at BME-ETT;
· Dense MCM-C multilayer substrate prototyping by diffusion patterning at IJS;
· Assembly of MCM-C with wire-bonded bare dice at IJS;
· Electrical performance tests in up-to the GHz range at PUB-CETTI;
· Electromagnetic Compatibility (EMC) and Signal Integrity Analyses (SIA) at PUB-CETTI;
· Reliability test and analyses using HTB (High Temperature with Bias) and THB (Temperature Humidity and Bias) including HAST at BME-ETT.
2. Increased Functional and Interconnection Density
The functional and interconnection density of electronic modules was increased by the application of integrated interconnection substrates, using new results on the following innovative process technologies.
2.1. High resolution laser patterning and via generation of laminated (MCM-L) substrates (@ TUB.HU)
Miniaturization ñ i.e. to achieve greater wiring density ñ is the primary aim of interconnection substrate manufacturing. The other important driving force is the need for rapid and low cost prototyping, especially in the field of MCMs. Laser induced direct patterning proved to be a process that fulfils both of these requirements.
Two pattern generation technologies were studied and developed (Figure 1.):
Line Cutting: the conducting lines (patterns) are determined by laser engraving,
Gap Cutting: the gaps (spacings) between interconnect lines are determined by the laser kerfs.
A Continuum HPO-1000 Nd:YAG laser with quadrupled 266†nm wavelength was used for the experimental patterning of MCM-L substrates.
The main steps of the gap cutting process using FR4 single-sided copper clad laminate are shown in the SEM photos and surface profile diagrams (by Alpha-Step) in Figure 2, as follows:
· electroplating tin onto the copper surface to form an etch-resistant, laser processable mask coating,
· direct pattern transfer into the tin coating using laser ablation (Figure a),
· wet chemical etching of the copper layer to obtain the conductive pattern (Figure b),
· tin removal by chemical etching (Figure c) and coating by electroless Ni and Au.
A laser patterned layout is presented in Figure 3.
2.2. Diffusion Patterning™ (using DuPont's technology) to fabricate high density thick film multilayer structures (Figure 4.) for MCM-C prototypes (@ JSI.SI and HIPOT.SI).
2.3. Application of micro BGA (Ball Grid Array) packages for MCM prototypes (Figure 5.) to achieve higher component density, improved electrical performance and lower cost (@ TUB.HU).
For evaluating the new micro-SMD components and its required technology a voltage-input, 4-20 mA current transmitter was designed as test circuit. The circuit was designed for universal application in various remote sensor systems, therefore it has symmetrical input and external amplification possibility for low-voltage application. The integrated circuits were available in chip size package (8-Bump micro SMD) using National's micro SMD package technology (Figure 6.). The size of the bumps is 0.18 mm.
The design and processing of MCMs are easier, cheaper and more effective with micro SMD components than with chip-and-wire ICs, thanks to the SMT compatible technology (Figures 6-8).
3. Established ENPACKED
ENPACKED, an Electronic Network for Packaging Education was established to maintain and strengthen the relationship between research institutions of Central-Eastern Europe (CEE) and their EU Partners. The ENPACKED Network (Figure 9.) provides structured access to the
· information of Members' home-pages,
· special educational courses,
· laboratory facilities,
· additional important links.
4. Links Established with SMEs
In the three Central European partner countries (in HU, RO and SLO) links were established with hundreds of newly-formed Small and Medium-size Enterprises (SMEs) responsible for product development and distribution. These enterprises already used the services of the established prototyping facility.
5. Safeguarded and Stabilized RTD Potential
The RTD potential of the three countries in the field of packaging technology was safeguarded and stabilized by the project. Among other results it has been proved by the large number of publications, which are placed onto the ENPACKED web site.
In addition, a Virtual Laboratory for the support of packaging education was developed to prepare electronics packaging engineers for the needs of the 21st century (Figure 10.).
The Virtual Laboratory is accessible through the Internet (www.ett.bme.hu/vlab). It fulfills the principal main purposes; students and engineers can improve their knowledge of microelectronics packaging by studying manufacturing equipment, processes and products. It also provides an excellent possibility for students to make preparations for their hands-on experiments.
|
|
|
|
|
