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IMAPS/ACerS 3rd International Conference and Exhibition on Ceramic Interconnect and Ceramic Microsystems Technologies (CICMT) Begins Next Monday ^
Top IMAPS to Present Technical Session at SEMICON West 2007 ^
Top “Semi and IMAPS are exploring ways in which the two organizations can work cooperatively. We have started this process by putting together a group of five well regarded experts in the field of microelectronics and electronic packaging for this special session at Semicon West in San Francisco. The abstracts we’ve received indicate that the IMAPS session at SEMICON West will be of the highest caliber”, Adamson said. The following speakers have already committed papers to the IMAPS session:
This session at Semicon West will reflect the quality of papers that will be presented at the 40th IMAPS International Symposium on Microelectronics in San Jose, from November 11th – 15th. Please show your support for this select group of speakers and IMAPS by attending this special session at Semicon West.
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UCSD Presents
Nanowires, Nanotubes, Nanotechnology Next Tuesday,
April 24, 2007, at 6:00pm ^
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Location: UCSD @ Price Center, The Cove Room Time: 6:00 Social Pizza Hour, 7:00 Presentations Seating is limited, so make your reservations today by emailing or call Dave Virissimo at 619-464-5430. SPEAKERS: Deli Wang, Professor Overview of Research Activities Joined in 2004 after his postdoctoral research at Harvard Univ. Current research revolves around rational growth of new nanomaterials (semiconductor nanowires and nanowire heterostructures); investigation of fundamental electronic, optical and optoelectronic properties of nanostructures; design and development of functional nanoelectronic and nanophotonic systems, for communications, sensing, information storage, biological detection and medicine. Shadi A. Dayeh, PhD Candidate Electrical and Computer Engineering Department 1) Controlling the Growth and Transport Properties of III-V Semiconductor Nanowires for Electronic Applications III-V semiconductor nanowires (NWs) are engineered one-dimensional structures with unusual electronic and optoelectronic properties that hold great promise for next generation nanoelectronic devices (ITRS roadmap).1 To realize their potential, full understanding of and control over nanowire growth, electronic, and optical properties are required. Jeongwon Park, PhD Candidate Materials Science and Engineering Program 2) Electrical Properties and Structure Analysis of Y-junction Carbon Nanotubes Carbon nanotubes (CNTs) show promise for a new molecular electronics based technology due to unique electronic properties and extraordinary mechanical properties. CNTs can be synthesized to be either semiconducting or metallic. Consequently, they can be used in a wide variety of electronics including diodes, transistors, and high frequency devices. Dr. Bin, Xiang, Postdoctoral Fellow Electrical and Computer Engineering 3) The Growth of ZnO Nanowire Arrays & Potential Applications We successfully synthesized high-quality p-type and n-type ZnO nanowire arrays using simple chemical vapor deposition method in a conventional tube furnace, where phosphorus pentoxide has been used as the dopant source in the p-type ZnO nanowire growth process. :: Read more :: Indiana Chapter Vendor's Day and Mini-Symposium on April 30 - Vendor Deadline This Friday ^
Top The Indiana Chapters of IMAPS and SMTA are joining together to sponsor their annual Vendor’s Day program on Monday, April 30, 2007. It will be held in Indianapolis, Indiana at the Holiday Inn Select – Indianapolis International Airport. The vendor displays will be open from 4:30 P.M. to 7:00 P.M. and will include a cash bar, door prizes and free hors d’oeuvres for all. A joint IMAPS and SMTA technical symposium begins at 1:00 P.M., featuring presentations by a variety of industry leaders, engineers and inventors. Admission to both events is FREE to all attendees. Vendor tables are $190 per six-foot table. To reserve a table please contact Vendor’s Day Chairman Larry Wallman at 317-887-2564, or at lwallman@sbcglobal.net. Table registrations will be accepted until April 20. Schedule of Speakers and Topics:
New England Chapter 34th Symposium and Expo In Just 2 Short Weeks ^
Top 80 Exhibitors / 500 Attendees are expected Technical Symposium - Vendor Technical Presentation Come join us for this Premier Regional Microelectronics Event where this year’s theme is 007 Technology Shaken Not Stirred. Register On-line - Exhibitors and Attendees Exhibitor Registration (pdf) Arizona Chapter Lunch Meeting on Thursday, May 10, Featuring a Presentation from Sandia National Labs on 3D Packaging ^ Top
Garden State Chapter Spring Symposium on May 15 ^ Top
Session 1: Flip Chip Packaging Session 1 continues the trend for the Garden State IMAPS symposium by focusing on Flip Chip Packaging advances and techniques. The Flip Chip industry is still expanding due to the increased demands for higher performance interconnects between the silicon die and the chip carrier. Presentations will cover process enhancements, materials and reliability. Session 2 will explore some of the most advanced electronic packaging being developed in our industry. Pressures for high performance, as well as integration, is driving some novel uses of materials and packaging techniques. Presentations will cover embedded active and passive devices, high speed connectors, organic optical wave guides and various strictures, materials and process. Visit http://www.imaps-gs.org for more information. Register online at http://www.imaps.org/registration/garden2007.htm. On-line registration ends May 10th. SoCal’07 Symposium and Exhibition to Offer Stellar Program, Tabletop Exhibition and Golf Tournament ^
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Golf Tournament: We have a limited number of slots, so get your reservation in early! You can RSVP for the Symposium, or Golf at http://www.imaps.org/registration/socal2007.htm. Golf Benefit Chairman: Larry Driscoll The following papers will be presented:
Register On-Line For SoCal 2007 General Chair Metro Chapter to Offer Two Courses This May - Hybrid Pre Cap Visual Inspection; and Process Certification and Defect Recognition: Hybrids, Microcircuits and RF/MMIC Modules ^
Top Hybrid Pre Cap Visual Inspection (1 Day)
Hybrids/MCMs/RF Modules all require a visual inspection step just prior to encapsulation or hermetic seal. This is a critical process step that requires a high degree of operator skill and understanding of what to look for and reject as part of the inspection process. This course defines the inspection criteria based on traditional Mil Spec documents in conjunction with industry accepted best commercial practices. Over 200 color photographs of actual production defects are reviewed and discussed in detail. The students are exposed to a variety of defects and how the defects relate to the materials and process flow. Inspection checklists are used to simply the criteria and focus on the major problem areas.
The course is intended for quality assurance personnel, inspectors, lead operators and others responsible for inspection of the hardware prior to the final package sealing process. Course Outline: Hybrid Materials and Processing Overview
General Inspection Guidelines and Procedures Visual Inspection Requirements Flowdown
Pre Cap Visual Inspection Criteria
Foreign Material Identification and Contamination Control Rework and Repair Limitations External Visual Inspection Summary and Course Critique Process Certification and Defect Recognition - Hybrids, Microcircuits and RF/MMIC Modules
How You Will Benefit: After completing this course you will:
Who Should Attend: This course is a must for process engineers, design engineers, manufacturing engineers and senior technicians. Inspectors and experienced operators looking to broaden their knowledge base and understanding of visual inspection criteria would also benefit. The course is also suited for newly assigned engineers and QA personnel looking to learn the basic terminology and key concepts vital to the manufacturing floor. Trained instructors with years of industry experience deliver the material in a straightforward and easy to understand format. About this Course: Most companies struggle to introduce new lines and waste countless manhours and resources resolving old problems on the manufacturing floor. Much of this waste is directly tied to the knowledge and training level of the responsible individuals. This course is designed teach the fundamental materials and processes used in microelectronics manufacturing and develop an understanding of the relevant visual inspection criteria. “Knowing what to do” is the first step towards lower costs, improved quality and faster throughput. Multimedia powerpoint presentations and video clips introduce the basics in a classroom setting. Seminar Instructor: Thomas J Green has over twenty five years of experience in the microelectronics industry at Lockheed Martin Astro Space and USAF Rome Laboratories and as an Adjunct Professor at the National Training Center for Microelectronics. During that time period he was a Staff engineer responsible for the materials and manufacturing processes used in building custom high reliability space qualified microcircuits (Hybrids, MCMs and RF modules) for military and commercial communication satellites. Tom has demonstrated expertise in wirebonding, component attach, and seam sealing processes. He has conducted and analyzed numerous statistically designed experiments, which increased first past yield, reduced costs and improved product quality. At Rome Labs he worked as a senior reliability engineer and analyzed component failures from AF avionic equipment along with providing technical support for a variety of Mil specs and standards (e.g. MIL-PRF-38534 and MIL-STD-883). Tom is an active member of the IMAPS (International Microelectronics and Packaging Society) at both the regional and national levels and serves on the IMAPS National Technical Program Committee. Tom has a Masters degree in Industrial Engineering and a B.S. in Metallurgy and Material Science from Lehigh University. He's published numerous technical papers and in recent years has completed many successful in plant consulting projects. Course Outline: DAY 1 Introduction to Manufacturing Processes
Manufacturing Assembly Process Overview
Visual Inspection Source Requirements Semiconductor Processing Overview GaAs MMIC wafer Fab overview
Foreign material identification and control
Cleanroom Requirements and Industry Protocols Commercial vs Military Visual Inspection Requirements Incoming High Power wafer/chip inspection Workmanship Standards* Semiconductor Fab related defects (Incoming Visual Inspection) High Powered Inspection
DAY 2Thick Film Processes
The drying and firing process
Thin Film Processes
Plating operations
Laser trimming processes
Review of Workmanship Standards*Substrate Related Defects
Processing fundamentals for Component Attach
Material properties overview Fluid Dispensing
DAY 3Die and substrate attach Solder attach of GaAs chips Overview of Common Cleaning Processes
Review of Workmanship Standards* related to component attach
Wirebonding Process Overview
Material properties of bonding wire Wire bonding tools Factor that affect the wirebond process Wire bonding reliability and yield problems Review of Workmanship Standards* Interconnects (Pre Cap Visual Inspection)
Intermetallic growth and what to look for
DAY 4Hermetic Packaging Process Overview
Review of Workmanship Standards* (External Visual Inspection)
Course Summary Student Examination, Test and Review French Chapter SIP-SOC Technical Meeting, CAEN, May 24 ^
Top The success of the 2006 event incited IMAPS France to keep the same topic, for the 2007 meeting, with an application oriented approach. The workshop will be held, on May 24, in Caen in the frame of a partnership with NXP the former semiconductor branch of Philips. After the registration of the participants, in the NXP facilities, our partners will present the company and their own SIP/SOC strategy. Then, several industrial actors will disclose their experience returns and the resulting impact on the development of new products, in different market areas including medical, automotive, smart card and wireless systems. They will explain as well how those technologies help to fit in with emerging social needs as assistance, security or identification. In addition, demonstrations of CAD tools, a poster session and, in the afternoon, the visit of several laboratories or industrial sites will be proposed to the participants according to one’s preference. For registration or information: Please contact Florence Vireton at the IMAPS France office, imaps.france@imapsfrance.org Or visit the chapter web site, www.imapsfrance.org EMPC 2007 - 16th European Microelectronics and Packaging Conference & Exhibition ^
Top EMPC2007 is the bi-annual IMAPS EUROPE conference, this time organized by IMAPS-NORDIC, the Nordic Chapter of IMAPS. EMPC2007 is co-sponsored by IEEE-CPMT Europe, SMTA and NOKIA. The EMPC conference addresses "everything in electronics between the chip and the system” welcoming everyone working with or designing products that need to be small, compact, cost effective, reliable and still having complex functionality.
Please find more details at the conference website: www.empc2007.org. We look forward to meeting you all in Oulu. |
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Society Awards 2007 Deadline: May 15th ^
Top The 2007 Awards Nominating Committee is actively seeking nominations for these awards: the Daniel D. Hughes, Jr. Memorial Award; the William D. Ashman Achievement Award; the John A. Wagnon Technical Achievement Award; the Outstanding Educator Award; the Sidney J. Stein International Award; the Corporate Recognition Award; and the Fellow of the Society Award. The Lifetime Achievement Award is also an individual award, but will be awarded only occasionally when a deserving individual is identified and nominated. Visit http://www.imaps.org/awards/index.htm for details and to nominate that special member. Nominations will be accepted until May 15, 2007.
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IMAPS/ACerS 3rd International Conference and Exhibition on Ceramic Interconnect and Ceramic Microsystems Technologies (CICMT) Begins Next Monday (
Ceramic
Interconnect and Ceramic Microsystems Technologies (CICMT 2007)
April 23-26, 2007
Denver, CO
*Exhibitors contact abell@imaps.org
Military, Aerospace, Space and Homeland Security (MASH): Packaging Issues and Applications (MASH)
May 8-10, 2007
Baltimore, MD
*Exhibitors contact abell@imaps.org
IMAPS Session at SEMICON WEST 2007
July 18, 2007
San Francisco, CA
Thermal Management
September 24-27, 2007
San Jose, CA
IMAPS 2007 - 40th International Symposium on Microelectronics
November 11-15, 2007
San Jose, CA
*Exhibitors contact abell@imaps.org
Integrated/Embedded Passives
November 15-17, 2007
San Jose, CA
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