Chicago/Milwaukee Chapter Meeting Next Tuesday, March 20, Featuring Presentation on Fine Pitch Circuitry on Three Dimensional Substrates ^
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| Location: |
Silver Stallion Restaurant and Meeting Facility
1275 Lee Street
Des Plaines, IL 60018 |
| Time: |
Networking at 5:30
Dinner at 6:00
Presentation at 7:00 |
| Investment: |
$20.00 Members
$25.00 Non-members
$10.00 Students/Retirees
$5.00 Displaced members |
| Reservations: |
Mark Naretto at (815) 235-6935 or e-mail to: mark.naretto@honeywell.com. |
| Speaker: |
Victor Zaderej - Molex |
| Title: |
Fine Pitch Circuitry on Three Dimensional Substrates |
Abstract:
Molded Interconnect Devices (MIDs) have been manufactured and used by many of industries most recognizable names such as IBM, Ford, Motorola, and Nokia for over twenty years. Applications have included electromagnetic filters, the internal elements of cell phones, various antennas, sensor housings, automotive switches and lighting devices.
To date, the circuitry on these applications has been rather simple because of limitations of the manufacturing techniques. Lines and spaces of 0.3 mm or larger have been common; but as the electronics industry matures, the need for finer pitch capability grows dramatically. The imaging systems used today are capable of creating lines and spaces down to 0.1 mm in very dense patterns.
With advances in laser and computer processing, it is now possible to do three-dimensional layout of circuitry as well as the application of patterns directly onto three-dimensional substrates with two process steps. The two steps are laser mark and plate, whereas in the past seven steps were required.
This manufacturing technique opens the door to the opinion of mounting fine pitch devises much as processors, sensors, ASICs, memory, etc. directly to three dimensional surfaces whereas in the past it was only possible to use larger scale devices.
Potential applications that could change the way electronic packaging is done include the ability to add components, antennas, and shielding directly on the inside surfaces of decorative or functional housings, sensors that can be fit into unusual locations, and the combining of mechanical and electrical functions into one highly integrated “backbone” for a variety of electronic devices.
These modern design tools and materials will be a driver in how future electromechanical packages will be designed. They will provide engineers with new ways to reduce the cost, weight, and size of the ever more complex products that consumers demand.
Speaker’s Biography:
Vic graduated from MIT with a SB and SM in Mechanical Engineering in 1982. After graduation he worked for IBM in Boca Raton Florida where he was the lead engineer on the PS/2 Model 50 computer, one of the first all plated plastic computers. In 1989, he began his career in the Molded Interconnect Device industry with Mintpac Technologies, a GE Plastics and Circuitwise joint venture. In 1999, Vic and a business partner started a company called 3Di which has since become part of Molex and which specializes in the area of selectively plating plastic devices. Vic has 29 patents in the MID industry.
San Diego Chapter Dinner Meeting March 27 Featuring Presentation Entitled Thomas Edison Was Onto Something ^
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The San Diego Chapter of IMAPS,invites you to attend our March 27th Dinner Meeting, at the Holiday Inn, 3805 Murphy Canyon Rd., San Diego. The after dinner talk by Dan Squiller, CEO, PowerGenix is entitled “Thomas Edison Was Onto Something”. Social hour is at 5:30 p.m., with dinner at 6:30 and the talk at 7:15. The cost is $7 (RSVP’d Students), $15 (RSVP’d Members) or $20 (Others). For information or to RSVP, contact Dave Virissimo at (619) 464-5430 or dvirissimo@sempck.com.
Abstract:
In a world of gigahertz microprocessors, gigabyte iPods, and GPS enabled cell phones, the world of rechargeable batteries might seem rather pedestrian. Nothing could be further from the truth. Developing the next generation batteries for these power hungry devices is one part chemistry, one part engineering, and one part black magic. From exploding lithium laptop batteries to batteries that power pacemakers, the battery industry is investing an enormous amount of money into new battery technologies.
Over 100 years ago, Thomas Edison was issued a patent for the first nickel zinc battery. The benefits of nickel zinc battery chemistry are many and well known. Why then have you never heard of nickel zinc? PowerGenix is on the path of making nickel zinc a household word and aims to obsolete nickel cadmium (“ni-cad”) and nickel metal-hydride batteries which were introduced over 40 years ago.
Previous attempts of companies to commercialize nickel zinc technology have failed. Learn what goes inside the batteries we take for granted and why PowerGenix believes it can change the multi-billion dollar battery industry. Along the way, you’ll ride the ups and downs of a venture capital backed San Diego start-up company competing with the Duracells, Energizers and Sanyos of the world.
Speaker Bio:
Mr. Squiller has over 20 years experience in building high technology companies and joined PowerGenix as CEO in 2003. PowerGenix develops next generation Nickel-Zinc rechargeable batteries, initially focused on cordless power tools and consumer markets. Previous to PowerGenix, he was President of Lambda Power, a global manufacturer of power supplies and division of Invensys, plc.
His experience in building early stage companies includes Indyme Electronics, a provider of telecommunications equipment where he was general manager and St. Bernard Software a provider of enterprise network protection software where he was vice president of business development and sales. He has successfully raised multiple rounds of venture capital funding for his companies.
Earlier in his career, Mr. Squiller spent ten years at the San Diego division of Scientific Atlanta that specialized in spectrum analysis and vibration health monitoring systems for commercial and Government business sectors. While at Scientific Atlanta, he held positions in general management, engineering, marketing, and operations.
Mr. Squiller holds a BSEE and MA in Organizational Communication from Ohio University.
Angel(LA) Chapter March 27 Dinner Meeting and Presentation on Electronics for High Temperature Environments ^
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| DATE : |
Tuesday, March 27, 2007 |
| LOCATION : |
PROUD BIRD RESTAURANT
11022 Aviation Blvd.
Los Angeles (Near LAX)
(310) 670-3815 |
| SCHEDULE : |
6:00 - Arrival & Networking
6:30 - Announcements Angel Chapter – Maurice Lowery
6:45 - Dinner
7:30 - Technical Presentation By, Linda Del Castillo JPL
8:30 - Adjourn |
| COST : |
$10 for IMAPS members
$20 for non-members
(No charge for Presentation only) |
| RESERVATIONS: |
Please RSVP Maurice Lowery, maurice.lowery@ngc.com, by Mar. 23, 2007 (Specify any diet restrictions) |
ABOUT THE PRESENTATION AND AUTHOR
Electronics for High Temp. Environments
Abstract
Previous Venus landers employed high temperature pressure vessels, with thermally protected electronics, to achieve successful missions, with a maximum lifetime of 127 minutes. Extending the operating range of electronic systems to the temperatures (480C) and pressures (90 bar) of the Venus ground ambient would significantly increase the science return of future missions. Current work describes the innovative design and screening process of various electronics capable of working in the Venus ground ambient environment using commercial components.
The Speaker
Linda Del Castillo is a Senior Materials Scientist/Engineer in the Advanced Electronic Packaging Group at the Jet Propulsion Laboratory. She has been involved in several projects including electronic packaging for active membrane radar applications, flexible embedded active devices, heterogeneous integration of a MEMS neuro-prosthetic system, investigations of embedded passives and lead free solders, as well as MEMS fabrication, and most importantly for this presentation, high temperature survivable electronic systems for the Venus environment. She received her Ph.D. in Materials Science and Engineering from the University of California, Irvine in 2000, where Linda worked primarily on the development of light-weight, spray deposited Al alloys for aircraft applications.
New England Chapter Meeting Tuesday, March 27 ^
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Tuesday, March 27, 2007
Best Western Chelmsford Inn
Presentation on "Performance Definition of B-Stageable Adhesive for a Near Hermetic LCP Package Solution"
by David Gibson - Applications Technology Group Emerson & Cuming Circuit Assembly Materials.
at the Best Western Chelmsford Inn
map of 187 Chelmsford St
Chelmsford, MA 01824-2307
978-256-7511
Click here for full abstract and meeting information
Click here for a PDF meeting registration notice
Metro Chapter Meeting March 28 Featuring Presentation on Static and Dynamic Characterization of MEMS using White Light Interferometric Microscopes ^
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Due to the high volume of registration, we recommend that you pre-register or we can not guarantee that you will be able to register at the door. Space is limited
| When: |
March 28, 2007
Registration/Networking 5-6:30 PM
Dinner Buffet: 6:30-7:15 PM
Technical Presentation: 7:15-8:00 PM |
| Where: |
Holiday Inn Ronkonkoma
3845 Veterans Highway
Ronkonkoma, NY 11779
Ph: 631-585-9500 |
| Price: |
Members:
$30.00 if Pre-Registered by March 26, 2007
$35.00 After March 26, 2007
Non-Members:
$35.00 if Pre-Registered by March 26, 2007
$40.00 After March 26, 2007
There are a limited number of vendor tables available for this meeting at a cost of $200.00. Please contact Steve Lehnert if you are interested. |
| Pre Registration: |
Email: slehnert@mdipower.com
Phone: Steve Lehnert (631) 345-3100 |
Featuring a Technical Presentation on Static and Dynamic Characterization of MEMS using White Light Interferometric Microscopes
Optical profiling (white light interferometry) has long been a primary metrology tool for 3D MEMS characterization from Research & Development to production in field such as Tribology, Data Storage and Semiconductor. Surface roughness and step heights, either from etching or deposition have long been verified using Interferometric Microscopes. This measurement technique has seen a very rapid increase in use in the field of MEMS over the past 5 years.
Initial implementation in the MEMS field was in the static realm where complete devices were measured in a single, large field of view. The results of interest being feature heights, surface roughness, form and feature thickness. White light interferometery became the perfect solution for rapid, accurate, 3D visualization of single and multiple devices.
The addition of a stroboscopic light source enabled characterization of MEMS devices under actual operating conditions. Developers could now investigate in-plane and out-of-plane movement for such psychical parameters as amplitude of movement, resonance frequency, switching time and surface distortion.
Finally, the addition of a microscope objective (Through Transmissive Media- TTM) to observe packaged parts allowed investigation in sealed environments; such as, vacuum. Thus, allowing static and dynamic measurement on devices that historically had proven difficult if not impossible previously.
White Light Interferometeric Microscopes have become an important the tool for 3D MEMS characterization. The microscopes are simple to use, very repeatable and extremely flexible, thus allowing use in production environments.
Wayne Mozer has been employed at Veeco Instruments for the past 10 years. Current responsibilities are as Product Specialist. Wayne has a long experience in application development having being employed as an Application Scientist for more than 20 years.
International Conference on Electronics Packaging (ICEP) 2007 ^
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Sponsored by:
IMAPS Japan / JIEP
IEEE CPMT Society Japan
Supported by
IMAPS Asia-ALC
April 18 -20, 2007
Shinagawa Prince Hotel, Tokyo, Japan
Technical Topics for Conference Papers:
Advanced Packaging, Area Array Packages, Board EMC Evaluation,
Built-up Substrates, Bump Formation, Environmental Aspects,
EPD/EAD Technology, Flip Chip Technology, High Speed Board Design,
Interconnections, LCD Module Packaging, Lead Free Soldering,
Manufacturing, Materials, MCM, MEMS Packages, Nano Technology, Optoelectronics, Reliability and Testing, Stacked Structure,
Substrate/Interposer, System in Package, Thermal Management,
Thin Film Technologies, Trend and Education, Underfilling,
VLSI Packaging, Wafer Level Packaging, etc.
Registration Fees:
Speaker 40,000 yen. (Including Reception and Proceedings)
Organizing Committee:
General Chair: Y. Shimada (NEC),
Vice General Chair: H. Nishida (NEP Tech.), M. Nakamura (Hitachi)
Contact:
Secretariat of ICEP 2007
IMAPS Japan / JIEP (Japan Institute of Electronics Packaging)
3-12-2 Nishiogikita, Suginami-ku
Tokyo 167-0042, Japan
Tel: +81-3-5310-2010, Fax: +81-3-5310-2011
E-mail: imaps-j@jiep.or.jp or icep@jiep.or.jp
URL: http://www.jiep.or.jp/icep/
New England Chapter 34th Symposium and Expo ^
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The New England Chapter's 34th Symposium and Expo is being held Tuesday, May 1st at the Holiday Inn Boxborough Woods, Boxborough MA.
80 Exhibitors / 500 Attendees are expected
Technical Symposium - Vendor Technical Presentation
Come join us for this Premier Regional Microelectronics Event where this year’s theme is 007 Technology Shaken Not Stirred.
Technical Program
Exhibitor Registration (pdf)
Attendee Registration Form (word)
Garden State Chapter Spring Symposium on May 15 ^
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| Date: |
May 15, 2007 |
| Time: |
1:00 P.M. |
| Location: |
Lucent Technologies, Murray Hill, NJ
600 Mountain Avenue
Murray Hill, NJ 07974 |
| Prices: |
Exhibit - $175.00 (before May 1, 2007 - $150.00)
Attendee - $20.00 member, $30.00 non-member
Prices include breaks and dinner reception |
Session 1: Flip Chip Packaging
Session 1 continues the trend for the Garden State IMAPS symposium by focusing on Flip Chip Packaging advances and techniques. The Flip Chip industry is still expanding due to the increased demands for higher performance interconnects between the silicon die and the chip carrier. Presentations will cover process enhancements, materials and reliability.
Session 2: Advanced Packaging
Session 2 will explore some of the most advanced electronic packaging being developed in our industry. Pressures for high performance, as well as integration, is driving some novel uses of materials and packaging techniques. Presentations will cover embedded active and passive devices, high speed connectors, organic optical wave guides and various strictures, materials and process.
Visit http://www.imaps-gs.org for more information.
Metro Chapter to Offer Two Courses This May - Hybrid Pre Cap Visual Inspection; and Process Certification and Defect Recognition: Hybrids, Microcircuits and RF/MMIC Modules ^
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The Metro Chapter of IMAPS is pleased to offer the following courses.
Hybrid Pre Cap Visual Inspection (1 Day)
| Date: |
May 21, 2007 |
| Time: |
8:00 AM-4:30 PM |
| Location: |
Holiday Inn Ronkonkoma
3845 Veterans Highway
Ronkonkoma, NY 11779
Ph: 631-585-9500 |
| Cost: |
$350.00 - 1-5 attendees
$300.00 - 5+ attendees
Includes Continental Breakfast and Lunch. Space is limited so reserve early |
| Reservations: |
For reservations or additional information, Contact:
Steve Lehnert
(631) 345-3100
slehnert@mdipower.com
Please make checks payable to Metro IMAPS
Mail To:
Steve Lehnert
C/O Modular Devices
One Roned Road
Shirley, NY 11967 |
Hybrids/MCMs/RF Modules all require a visual inspection step just prior to encapsulation or hermetic seal. This is a critical process step that requires a high degree of operator skill and understanding of what to look for and reject as part of the inspection process. This course defines the inspection criteria based on traditional Mil Spec documents in conjunction with industry accepted best commercial practices. Over 200 color photographs of actual production defects are reviewed and discussed in detail. The students are exposed to a variety of defects and how the defects relate to the materials and process flow. Inspection checklists are used to simply the criteria and focus on the major problem areas.
- Understand what to look for as part of a pre cap visual inspection
- Learn how to interpret and apply traditional Mil Spec visual inspection guidelines
The course is intended for quality assurance personnel, inspectors, lead operators and others responsible for inspection of the hardware prior to the final package sealing process.
Course Outline:
Hybrid Materials and Processing Overview
General Inspection Guidelines and Procedures
Visual Inspection Requirements Flowdown
- MIL-PRF-38534
- MIL-STD-883
Pre Cap Visual Inspection Criteria
- Defects related to wafer fab, saw and break, probe test etc.
- Thick Film/Thin film substrate defects e.g cracks, chipouts
- Laser Trim defects
- Epoxy die attach, fillet criteria, typical problems encountered
- Eutectic solder attach
- Epoxy attach of chip capacitors and chip resistors
- Wirebond defects (e.g. Excessive squash out, heel cracks, misplaced bonds etc.)
Foreign Material Identification and Contamination Control
Rework and Repair Limitations
External Visual Inspection
Summary and Course Critique
Process Certification and Defect Recognition - Hybrids, Microcircuits and RF/MMIC Modules
| Date: |
May 22-25, 2007 |
| Time: |
8:00 AM-4:30 PM - May 22-24
8:00 AM-1:00 PM - May 25 |
| Location: |
Holiday Inn Ronkonkoma
3845 Veterans Highway
Ronkonkoma, NY 11779
Ph: 631-585-9500 |
| Cost: |
$1750.00 - 1-5 attendees
$1500.00 - 5+ attendees
Includes Continental Breakfast, Lunch and Comprehensive Student Workbook (250 pages). Space is limited so reserve early |
| Reservations: |
For reservations or additional information, Contact:
Steve Lehnert
(631) 345-3100
slehnert@mdipower.com
Please make checks payable to Metro IMAPS
Mail To:
Steve Lehnert
C/O Modular Devices
One Roned Road
Shirley, NY 11967 |
How You Will Benefit:
After completing this course you will:
- Advance your understanding of the basic materials and processing steps used in the assembly of Hybrids, Microcircuits and RF/MMIC Modules.
- Know what you’re looking at and what constitutes a “reject” in the production flow along with the technical rationale to support the decision.
- Be able to explain to others visual defects that result from the basic manufacturing processes: i.e. wirebond, component attach, thick and thin film processing etc.
- Learn how to interpret and apply the visual inspection criteria contained in the "Workmanship Standards for Hybrids, Microcircuits and RF/MMIC Modules” 2002 Edition*
Who Should Attend:
This course is a must for process engineers, design engineers, manufacturing engineers and senior technicians. Inspectors and experienced operators looking to broaden their knowledge base and understanding of visual inspection criteria would also benefit. The course is also suited for newly assigned engineers and QA personnel looking to learn the basic terminology and key concepts vital to the manufacturing floor. Trained instructors with years of industry experience deliver the material in a straightforward and easy to understand format.
About this Course:
Most companies struggle to introduce new lines and waste countless manhours and resources resolving old problems on the manufacturing floor. Much of this waste is directly tied to the knowledge and training level of the responsible individuals. This course is designed teach the fundamental materials and processes used in microelectronics manufacturing and develop an understanding of the relevant visual inspection criteria. “Knowing what to do” is the first step towards lower costs, improved quality and faster throughput. Multimedia powerpoint presentations and video clips introduce the basics in a classroom setting.
Seminar Instructor:
Thomas J Green has over twenty five years of experience in the microelectronics industry at Lockheed Martin Astro Space and USAF Rome Laboratories and as an Adjunct Professor at the National Training Center for Microelectronics. During that time period he was a Staff engineer responsible for the materials and manufacturing processes used in building custom high reliability space qualified microcircuits (Hybrids, MCMs and RF modules) for military and commercial communication satellites. Tom has demonstrated expertise in wirebonding, component attach, and seam sealing processes. He has conducted and analyzed numerous statistically designed experiments, which increased first past yield, reduced costs and improved product quality. At Rome Labs he worked as a senior reliability engineer and analyzed component failures from AF avionic equipment along with providing technical support for a variety of Mil specs and standards (e.g. MIL-PRF-38534 and MIL-STD-883). Tom is an active member of the IMAPS (International Microelectronics and Packaging Society) at both the regional and national levels and serves on the IMAPS National Technical Program Committee. Tom has a Masters degree in Industrial Engineering and a B.S. in Metallurgy and Material Science from Lehigh University. He's published numerous technical papers and in recent years has completed many successful in plant consulting projects.
Course Outline:
DAY 1
Introduction to Manufacturing Processes
- Terminology and product definitions
- Hybrids…MCMs…RF/MMIC Modules
Manufacturing Assembly Process Overview
- Basic manufacturing process flows
Visual Inspection Source Requirements
Semiconductor Processing Overview
GaAs MMIC wafer Fab overview
Foreign material identification and control
Cleanroom Requirements and Industry Protocols
Commercial vs Military Visual Inspection Requirements
Incoming High Power wafer/chip inspection
Workmanship Standards* Semiconductor Fab related defects (Incoming Visual Inspection)
High Powered Inspection
- Monolithic silicon die
- Air bridges, mask defects, voids, metal defects
- Probe defects, scribing defects, edge cracks and chipouts
DAY 2
Thick Film Processes
- Substrate fabrication and materials overview
- Screen printing machine variables and controls
The drying and firing process
- Thickness measuring techniques
- Cofired ceramics LTCC
Thin Film Processes
- Sputtering vs vapor deposition
- Photolithography, coat and etch
Plating operations
- Electrolytic vs electroless plating
Laser trimming processes
- Thick and thin film resistors
Review of Workmanship Standards*Substrate Related Defects
- Cracks and Chip outs
- Scratches, voids and other defects
- Defects related to laser trimming
- Plating defects and metal lift
Processing fundamentals for Component Attach
- Automated handling and assembly of bare die
Material properties overview
Fluid Dispensing
- Critical processing parameters
DAY 3
Die and substrate attach
Solder attach of GaAs chips
Overview of Common Cleaning Processes
- Wet chemicals, Plasma cleaning
Review of Workmanship Standards* related to component attach
- Looking for the proper fillet
- Component to pad alignment issues
- Epoxy bleed and runout
- Flux contamination
- Excessive solder
- F/M resulting from the cure process and their effect on wirebonding
Wirebonding Process Overview
- Ultrasonic/thermosonic bonding
- Thermocompression bonding
- Ribbon bonding
Material properties of bonding wire
Wire bonding tools
Factor that affect the wirebond process
Wire bonding reliability and yield problems
Review of Workmanship Standards* Interconnects (Pre Cap Visual Inspection)
- Overdeformed bonds
- Underdeformed bonds
- Bond placement issues
Intermetallic growth and what to look for
- Defective bond pad metal and platings
- Misplaced bonds
- Lifted bonds
DAY 4
Hermetic Packaging Process Overview
- Seam sealing, Laser welding, Solder sealing
- Gross and fine leak testing
- Optical Leak testing techniques
Review of Workmanship Standards* (External Visual Inspection)
- Cracked seals
- Poor welds
- Plastic delamination
- Marking Defects
Course Summary
Student Examination, Test and Review
French Chapter SIP-SOC Technical Meeting, CAEN, May 24 ^
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For its 2006 regional meeting, IMAPS France organised, last May in Grenoble, an international workshop on the packaging solutions for system integration. The compared benefits and limitations of System In a Package (SIP) and System On a Chip (SOC) were emphasised and the main semiconductor manufacturers in Europe presented roadmaps for the implementation of their preferred solutions.
The success of the 2006 event incited IMAPS France to keep the same topic, for the 2007 meeting, with an application oriented approach. The workshop will be held, on May 24, in Caen in the frame of a partnership with NXP the former semiconductor branch of Philips.
After the registration of the participants, in the NXP facilities, our partners will present the company and their own SIP/SOC strategy. Then, several industrial actors will disclose their experience returns and the resulting impact on the development of new products, in different market areas including medical, automotive, smart card and wireless systems. They will explain as well how those technologies help to fit in with emerging social needs as assistance, security or identification.
In addition, demonstrations of CAD tools, a poster session and, in the afternoon, the visit of several laboratories or industrial sites will be proposed to the participants according to one’s preference.
For registration or information:
Please contact Florence Vireton at the IMAPS France office, imaps.france@imapsfrance.org
Phone: 33-(0)1-39 67 17 73 Fax: 33-(0)1-39 02 71 93
Or visit the chapter web site, www.imapsfrance.org
EMPC 2007 - 16th European Microelectronics and Packaging Conference & Exhibition ^
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We warmly invite you to the 16th European Microelectronics and Packaging Conference and Exhibition: EMPC2007. EMPC2007 takes place in the high-tech city of Oulu, Finland, June 17 - 20.
EMPC2007 is the bi-annual IMAPS EUROPE conference, this time organized by IMAPS-NORDIC, the Nordic Chapter of IMAPS. EMPC2007 is co-sponsored by IEEE-CPMT Europe, SMTA and NOKIA.
The EMPC conference addresses "everything in electronics between the chip and the system” welcoming everyone working with or designing products that need to be small, compact, cost effective, reliable and still having complex functionality.
- More than 150 presentations on opto, nano, micro, MEMS, 3D packaging, SIP, embedded components, applications, medical, RF, thermal management, ceramics, laminates & flex, etc.
- EU, NAMIS, GBC special sessions
- 6 short courses
- A very focused busy exhibition
Please find more details at the conference website: www.empc2007.org. We look forward to meeting you all in Oulu. |