March Metro Meeting A Big Success - Don't Miss the May Meeting ^
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On March 28, 2007, METRO IMAPS held a dinner meeting at the Holiday Inn, Ronkonkoma, New York. Forty people turned out to Dr. Wayne Mozer discuss:
“Static and Dynamic Characterization of MEMS using White Light Interferometric Microscopes”. The talk was followed by the usual question and answer period leading to further discussions of the application.
A 1 hour networking and social event allowing the members to exchange ideas and solutions that they are facing in today’s challenging market preceded the meeting.
Avid Associates represented by Mike Laing, had a tabletop exhibit once again showing their support for IMAPS in general and the Metro chapter in particular.
The next Metro meeting is tentatively scheduled for the end of May please check the IMAPS web site for additional information or contact Steve Lehnert slehnert@mdipower.com.
Garden State Chapter Spring Symposium Next Tuesday, May 15 - Online Registration Ends This Thursday ^
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| Date: |
May 15, 2007 |
| Time: |
1:00 P.M. |
| Location: |
Lucent Technologies, Murray Hill, NJ
600 Mountain Avenue
Murray Hill, NJ 07974 |
| Prices: |
Exhibit - $175.00
Attendee - $25.00 member, $35.00 non-member
Prices include breaks and dinner reception
Register online at http://www.imaps.org/registration/garden2007.htm. |
Session 1: Flip Chip Packaging
Session 1 continues the trend for the Garden State IMAPS symposium by focusing on Flip Chip Packaging advances and techniques. The Flip Chip industry is still expanding due to the increased demands for higher performance interconnects between the silicon die and the chip carrier. Presentations will cover process enhancements, materials and reliability.
Session 2: Advanced Packaging
Session 2 will explore some of the most advanced electronic packaging being developed in our industry. Pressures for high performance, as well as integration, is driving some novel uses of materials and packaging techniques. Presentations will cover embedded active and passive devices, high speed connectors, organic optical wave guides and various strictures, materials and process.
Visit http://www.imaps-gs.org for more information. Register online at http://www.imaps.org/registration/garden2007.htm. On-line registration ends May 10th.
SoCal’07 Symposium and Exhibition to Offer Stellar Program, Tabletop Exhibition and Golf Tournament Next Wednesday - Online Registration Ends This Friday ^
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SoCal’07 Technical Symposium and Tabletop Exhibition, sponsored by IMAPS Southern California Chapters, will be held on May 16, 2007 at the Anaheim Hills Golf Course. We will be having a Golf Tournament in the morning, with papers presented from 10am until 5 pm. Come for some, or come for all! We will have door prizes through out the event.
| Time: |
Golf Tournament 7 to 11 am |
| Presentations: |
10 to 11, 1 to 2:30, 3:30 to 5pm
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| Exhibits: |
10 to 12 & 1 to 4 pm
Note: Table top only. Exhibitors are encouraged to have their table top setup but are not expected to be "manning" it until after lunch. |
| Fees: |
Attendees: Free. Lunch is provided
Exhibitors: Contact Exhibits Chair, Bill Gaines
Golf : $100
Register On-Line |
Golf Tournament:
This year we are adding a benefit Golf event. This was very popular at National and the SoCal event in San Diego. Proceeds go to The Microelectronics Foundation.
We have a limited number of slots, so get your reservation in early! You can RSVP for the Symposium, or Golf at http://www.imaps.org/registration/socal2007.htm.
Golf Benefit Chairman: Larry Driscoll
21146 Ventura Blvd., Suite 202, Woodland Hills, CA 91364
Tel: 818-704-9087 x100 email:lmdriscoll@sctsinc.com
The following papers will be presented:
- FLUX-FREE AND VOID-FREE VACUUM SOLDERING PROCESS FOR ADVANCED MICROELECTRONICS PACKAGING
Paul W. Barnes, SST INTERNATIONAL
- CARBON COMPOSITE BRINGS THERMAL AND STRUCTURAL BENEFITS TO THE PRINTED CIRCUIT BOARD
Kris Vasoya, STABLCOR Inc
- Lithography-Grade Controlled Expansion Substrates for Wafer Level Packaging
Greg Rudd and Bob Cronk, SMI (Spectra-Mat, Inc.)
- WEEE & RoHS Directive: What Does It All Mean?
Gil White, Dynamic Details Inc Solid Micro Via Buildup Technology Gil White, Dynamic Details Inc
- PCTF Technology Enables Cost Effective SMT Packaging Solutions For RF Components And Modules
Nahum Rapoport, David Suconick, Moshe Kushnir Remtec, Inc.
Presented by Stu Weinshanker, Advanced Packaging Associates
- Thermally Enhanced Interface Adhesives As Replacements For Leaded And Lead-Free Solder
Steve Anagnostopoulos, Terry Hartman – Diemat, Inc.
Presented by Stu Weinshanker, Advanced Packaging Associates
- LED Packaging
Heraeus
On-Line Registration For SoCal 2007 Ends Friday, May 11
General Chair
Bill Gaines, Northrop Grumman
Email: William.gaines@ngc.com, Tel. (626)812-2199
Metro Chapter to Offer Two Courses This May - Hybrid Pre Cap Visual Inspection; and Process Certification and Defect Recognition: Hybrids, Microcircuits and RF/MMIC Modules ^
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The Metro Chapter of IMAPS is pleased to offer the following courses.
Hybrid Pre Cap Visual Inspection (1 Day)
| Date: |
May 21, 2007 |
| Time: |
8:00 AM-4:30 PM |
| Location: |
Holiday Inn Ronkonkoma
3845 Veterans Highway
Ronkonkoma, NY 11779
Ph: 631-585-9500 |
| Cost: |
$350.00 - 1-5 attendees
$300.00 - 5+ attendees
Includes Continental Breakfast and Lunch. Space is limited so reserve early |
| Reservations: |
For reservations or additional information, Contact:
Steve Lehnert
(631) 345-3100
slehnert@mdipower.com
Please make checks payable to Metro IMAPS
Mail To:
Steve Lehnert
C/O Modular Devices
One Roned Road
Shirley, NY 11967 |
Hybrids/MCMs/RF Modules all require a visual inspection step just prior to encapsulation or hermetic seal. This is a critical process step that requires a high degree of operator skill and understanding of what to look for and reject as part of the inspection process. This course defines the inspection criteria based on traditional Mil Spec documents in conjunction with industry accepted best commercial practices. Over 200 color photographs of actual production defects are reviewed and discussed in detail. The students are exposed to a variety of defects and how the defects relate to the materials and process flow. Inspection checklists are used to simply the criteria and focus on the major problem areas.
- Understand what to look for as part of a pre cap visual inspection
- Learn how to interpret and apply traditional Mil Spec visual inspection guidelines
The course is intended for quality assurance personnel, inspectors, lead operators and others responsible for inspection of the hardware prior to the final package sealing process.
Course Outline:
Hybrid Materials and Processing Overview
General Inspection Guidelines and Procedures
Visual Inspection Requirements Flowdown
- MIL-PRF-38534
- MIL-STD-883
Pre Cap Visual Inspection Criteria
- Defects related to wafer fab, saw and break, probe test etc.
- Thick Film/Thin film substrate defects e.g cracks, chipouts
- Laser Trim defects
- Epoxy die attach, fillet criteria, typical problems encountered
- Eutectic solder attach
- Epoxy attach of chip capacitors and chip resistors
- Wirebond defects (e.g. Excessive squash out, heel cracks, misplaced bonds etc.)
Foreign Material Identification and Contamination Control
Rework and Repair Limitations
External Visual Inspection
Summary and Course Critique
Process Certification and Defect Recognition - Hybrids, Microcircuits and RF/MMIC Modules
| Date: |
May 22-25, 2007 |
| Time: |
8:00 AM-4:30 PM - May 22-24
8:00 AM-1:00 PM - May 25 |
| Location: |
Holiday Inn Ronkonkoma
3845 Veterans Highway
Ronkonkoma, NY 11779
Ph: 631-585-9500 |
| Cost: |
$1750.00 - 1-5 attendees
$1500.00 - 5+ attendees
Includes Continental Breakfast, Lunch and Comprehensive Student Workbook (250 pages). Space is limited so reserve early |
| Reservations: |
For reservations or additional information, Contact:
Steve Lehnert
(631) 345-3100
slehnert@mdipower.com
Please make checks payable to Metro IMAPS
Mail To:
Steve Lehnert
C/O Modular Devices
One Roned Road
Shirley, NY 11967 |
How You Will Benefit:
After completing this course you will:
- Advance your understanding of the basic materials and processing steps used in the assembly of Hybrids, Microcircuits and RF/MMIC Modules.
- Know what you’re looking at and what constitutes a “reject” in the production flow along with the technical rationale to support the decision.
- Be able to explain to others visual defects that result from the basic manufacturing processes: i.e. wirebond, component attach, thick and thin film processing etc.
- Learn how to interpret and apply the visual inspection criteria contained in the "Workmanship Standards for Hybrids, Microcircuits and RF/MMIC Modules” 2002 Edition*
Who Should Attend:
This course is a must for process engineers, design engineers, manufacturing engineers and senior technicians. Inspectors and experienced operators looking to broaden their knowledge base and understanding of visual inspection criteria would also benefit. The course is also suited for newly assigned engineers and QA personnel looking to learn the basic terminology and key concepts vital to the manufacturing floor. Trained instructors with years of industry experience deliver the material in a straightforward and easy to understand format.
About this Course:
Most companies struggle to introduce new lines and waste countless manhours and resources resolving old problems on the manufacturing floor. Much of this waste is directly tied to the knowledge and training level of the responsible individuals. This course is designed teach the fundamental materials and processes used in microelectronics manufacturing and develop an understanding of the relevant visual inspection criteria. “Knowing what to do” is the first step towards lower costs, improved quality and faster throughput. Multimedia powerpoint presentations and video clips introduce the basics in a classroom setting.
Seminar Instructor:
Thomas J Green has over twenty five years of experience in the microelectronics industry at Lockheed Martin Astro Space and USAF Rome Laboratories and as an Adjunct Professor at the National Training Center for Microelectronics. During that time period he was a Staff engineer responsible for the materials and manufacturing processes used in building custom high reliability space qualified microcircuits (Hybrids, MCMs and RF modules) for military and commercial communication satellites. Tom has demonstrated expertise in wirebonding, component attach, and seam sealing processes. He has conducted and analyzed numerous statistically designed experiments, which increased first past yield, reduced costs and improved product quality. At Rome Labs he worked as a senior reliability engineer and analyzed component failures from AF avionic equipment along with providing technical support for a variety of Mil specs and standards (e.g. MIL-PRF-38534 and MIL-STD-883). Tom is an active member of the IMAPS (International Microelectronics and Packaging Society) at both the regional and national levels and serves on the IMAPS National Technical Program Committee. Tom has a Masters degree in Industrial Engineering and a B.S. in Metallurgy and Material Science from Lehigh University. He's published numerous technical papers and in recent years has completed many successful in plant consulting projects.
Course Outline:
DAY 1
Introduction to Manufacturing Processes
- Terminology and product definitions
- Hybrids…MCMs…RF/MMIC Modules
Manufacturing Assembly Process Overview
- Basic manufacturing process flows
Visual Inspection Source Requirements
Semiconductor Processing Overview
GaAs MMIC wafer Fab overview
Foreign material identification and control
Cleanroom Requirements and Industry Protocols
Commercial vs Military Visual Inspection Requirements
Incoming High Power wafer/chip inspection
Workmanship Standards* Semiconductor Fab related defects (Incoming Visual Inspection)
High Powered Inspection
- Monolithic silicon die
- Air bridges, mask defects, voids, metal defects
- Probe defects, scribing defects, edge cracks and chipouts
DAY 2
Thick Film Processes
- Substrate fabrication and materials overview
- Screen printing machine variables and controls
The drying and firing process
- Thickness measuring techniques
- Cofired ceramics LTCC
Thin Film Processes
- Sputtering vs vapor deposition
- Photolithography, coat and etch
Plating operations
- Electrolytic vs electroless plating
Laser trimming processes
- Thick and thin film resistors
Review of Workmanship Standards*Substrate Related Defects
- Cracks and Chip outs
- Scratches, voids and other defects
- Defects related to laser trimming
- Plating defects and metal lift
Processing fundamentals for Component Attach
- Automated handling and assembly of bare die
Material properties overview
Fluid Dispensing
- Critical processing parameters
DAY 3
Die and substrate attach
Solder attach of GaAs chips
Overview of Common Cleaning Processes
- Wet chemicals, Plasma cleaning
Review of Workmanship Standards* related to component attach
- Looking for the proper fillet
- Component to pad alignment issues
- Epoxy bleed and runout
- Flux contamination
- Excessive solder
- F/M resulting from the cure process and their effect on wirebonding
Wirebonding Process Overview
- Ultrasonic/thermosonic bonding
- Thermocompression bonding
- Ribbon bonding
Material properties of bonding wire
Wire bonding tools
Factor that affect the wirebond process
Wire bonding reliability and yield problems
Review of Workmanship Standards* Interconnects (Pre Cap Visual Inspection)
- Overdeformed bonds
- Underdeformed bonds
- Bond placement issues
Intermetallic growth and what to look for
- Defective bond pad metal and platings
- Misplaced bonds
- Lifted bonds
DAY 4
Hermetic Packaging Process Overview
- Seam sealing, Laser welding, Solder sealing
- Gross and fine leak testing
- Optical Leak testing techniques
Review of Workmanship Standards* (External Visual Inspection)
- Cracked seals
- Poor welds
- Plastic delamination
- Marking Defects
Course Summary
Student Examination, Test and Review
Arizona Chapter Meeting May 24 Featuring Rajen Chanchani's Presentation on 3D Integration Technologies: An Overview ^
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Rajen Chanchani of Sandia National Labs will be presenting 3D Integration Technologies: An Overview. The presentation will focus on three key technologies: the motivation, description, status, issues and examples of their applications and the enabling technologies required to process them:
- On-chip 3D integration - a ‘bottom-up’ approach where active layers are built-up over an IC wafer
- 3D stacking of ICs/wafers - a ‘top-down’ approach where ICs are fabricated independently and then stacked (‘wafer on wafer’ and ‘die on wafer’)
- 3D Packaging - the ICs are packaged in 3D Date: Thursday, May 24, 2007
| Date: |
Thursday, May 24, 2007 |
| Schedule: |
Registration and Lunch at 11:30 – 12:00
Presentation at 12:00 |
| Location: |
Mesa City Library
Dobson Ranch Branch
2425 S. Dobson Road
Mesa, AZ 85202 |
| Cost: |
Luncheon and presentation - $10.00
!!! Special - No Charge for pre-registered attendees !!!
Vendor display tables available for $15.00
|
| RSVP: |
RSVP by May 18th to: greg.clemons@intel.com or
Register as pre-registered attendee on-line:
http://www.imaps.org/chapters/freepass.asp |
French Chapter Announces the Postponement of the SIP-SOC Meeting ^
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Due to circumstances out of the control of IMAPS France, the SIP-SOC meeting which was planned May 24 in Caen, will be postponed to a later date. The new date, probably in next October, will be disclosed as soon as possible.
For information: please contact Florence Vireton at the IMAPS France office, imaps.france@imapsfrance.org or
Phone: 33-(0)1-39 67 17 73 Fax: 33-(0)1-39 02 71 93.
Or visit the chapter web site, www.imapsfrance.org
IMAPS Capital Chapter Joint Meeting June 5 with SMTA ^
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| Date: |
June 5, 2007 |
| Location: |
Howard County Room (located in the back of the cafeteria)
The Johns Hopkins University Applied Physics Laboratory (JHUAPL)
|
|
5:30 Registration
6:00 Dinner
6:30 1st speaker
7:15 2nd speaker
8:00 Discussion
|
| Registration: |
IMAPS/SMTA members - $20.00
|
Featuring Two Technical Presentations:
Applications of Osprey Lightweight Controlled Expansion (CE) Alloys
Stu Weinshanker, Director of CE Alloys Business Development.
BGA Coplanarity Reduction during the Ball Attach Process
Rick Lathrop, Heraeus CMD
RSVP: Please register no later than the Friday June 1.
Cancel if unable to attend, otherwise you may be billed.
EMPC 2007 - 16th European Microelectronics and Packaging Conference & Exhibition ^
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We warmly invite you to the 16th European Microelectronics and Packaging Conference and Exhibition: EMPC2007. EMPC2007 takes place in the high-tech city of Oulu, Finland, June 17 - 20.
EMPC2007 is the bi-annual IMAPS EUROPE conference, this time organized by IMAPS-NORDIC, the Nordic Chapter of IMAPS. EMPC2007 is co-sponsored by IEEE-CPMT Europe, SMTA and NOKIA.
The EMPC conference addresses "everything in electronics between the chip and the system” welcoming everyone working with or designing products that need to be small, compact, cost effective, reliable and still having complex functionality.
- More than 150 presentations on opto, nano, micro, MEMS, 3D packaging, SIP, embedded components, applications, medical, RF, thermal management, ceramics, laminates & flex, etc.
- EU, NAMIS, GBC special sessions
- 6 short courses
- A very focused busy exhibition
Please find more details at the conference website: www.empc2007.org. We look forward to meeting you all in Oulu.
8th International Conference on Electronics Packaging Technology (ICEPT 2007) - August 14th – 17th, 2007, Shanghai, China ^
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Since 1994, ICEPT has been held for seven times in Beijing, Shanghai and Shenzhen of China, respectively. Since 2005 ICEPT has been held once a year due to rapid development of electronics packaging. As the only international electronics packaging technology conference organized and supported by authoritative academic organizations and leading industries, each ICEPT has attracted hundreds of participants from colleges, research institutes, packaging testing manufacturers, packaging testing equipment factories, packaging materials factories including distinguished experts, scholars and enterprises. The conference highly focuses on semiconductor packaging design, semiconductor packaging manufacturing, semiconductor packaging testing, LED packaging, MEMS packaging, system packaging and assembly, etc. The conference, which is domestically the highest-level and the most large-scale event for electronics packaging and testing technology, has become an important communication platform for advanced packaging technology. The 8th ICEPT will be held from August 14th to August 17th of 2007 in Shanghai, which is the biggest base of microelectronics industry and financial hub. We sincerely invite your participation.
1. Conference Information
Time:
Training course:
1)Registration time for training course: In the afternoon of August 13th, 2007 (Monday)
2)Training course-attending time: August 14th, 2007 (Tuesday)
Conference:
1)Conference-attending registration: August 14th, 2007 (Tuesday)
2)Conference time: August 15th-17th, 2007 (Wednesday to Friday)
Venue
Sofitel Jin Jiang Oriental Hotel, 889 South Yang Gao Road, Pudong New Area, Shanghai, China
Conference Website http://www.icept.org
Conference Scale 400-500 participants
Conference Content
- Advanced Packaging & System Packaging: BGA, CSP, flip chip, WLP, nano-packaging, Cu/low-K packaging, 3D packaging, SiP and other advanced packaging and integration technologies.
- High Density Substrate & SMT: HDI, PCB, high performance multi-layer substrate, embedded substrate, micro via, microjoin, stencil print, reflow, and other novel assembly technologies that improve substrate density and performance.
- Packaging Design & Modeling: novel designs for various packaging/assembly, modeling, simulation and characterization solutions for electrical, thermal, optical & mechanical properties, multi-function & multi-scale modeling, simulation, validation methods and software technologies.
- Packaging Materials & Processes: interconnection and encapsulation materials including bonding wires, solder balls, solder pastes, conductive pastes, underfillings, plastic packaging materials, adhesives, thin-films, dielectric materials, substrate materials, frame materials, green electronic materials and other novel materials that enhance the packaging properties and reduce the cost,and various packaging and assembly processes.
- Advanced Manufacturing Technology: photolithography, laser processing, novel packaging/assembly technologies, advanced methods/softwares for modeling and monitoring of process effectiveness and cost analysis, and related manufacturing equipments.
- Emerging Technologies: sensors, actuators, MEMS, NEMS and MOEMS, optoelectronics & LED packaging, LCD, solid state lighting, passive and RF devices, power & HV devices, nanodevices based on nanowire, nanotubes and polymers, etc.
- Quality & Reliability: Quality monitoring and evaluation for packaging/assembly, advanced methods/technologies/tools for rapid reliability data collection and analysis system, reliability modeling & prediction, reliability issues in emerging technologies, testing equipments for quality control and reliability.
Conference Sections
Symposium, short course, academic communication, exhibition of new product & technology
Who Should Attend
Attendees of this conference in the past have been engineers, research scientists, equipment and material vendors, representatives from various packaging companies of packaging technology for IC, MEMS, Optoelectronics, LEDs, LCD, Magnetic Head, Sensors and PCB packaging and assembly. Due to the booming growth of the electronic/optoelectronic and emerging MEMS packaging industry in mainland China (including more than 300 IC packaging companies and several hundred LED packaging companies), this conference will provide a perfect platform for the exchange of information, research and industry development, and recruitment of young engineers.
2. Submission of Your Papers
If you want to submit a paper to this conference, please first send an abstract (500-1000 words) to our e-mail box technical.chair@icept.org or icept2007@sjtu.edu.cn (before May 31, 2007). Reported works in the abstract should be original and have not been published in other media or journals. The abstract should contain a clear statement of the purpose of the experiment, experimental results (including data, charts and pictures), conclusions and important references. All of the abstracts should be written in English based on the electronic template we send to you. We only accept electronic submission, which should include a word file and a PDF file simultaneously. Please put your detailed address (electronic mailbox, postal address, telephone and fax numbers) in the submitted abstract. All of the papers accepted by the ICEPT 2007 will be published in an IEEE conference proceeding. Research articles will be accepted and published in “Journal of Shanghai Jiao Tong University (English Edition)”, which is a source journal of Engineering Index (Ei). Corresponding author will be charged for publication in the above journal. In addition, IEEE-CPMT will publish a special section for selected papers based on a peer review process. For more information, please go to our website of http://www.icept.org.
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